A few positions open in our group:
Responsibilities
In this position, you will be a member of CTO's library development group and responsible for supplying cell libraries for all ICG projects. The scope includes developing standard cell libraries and associated collateral for Intel's internal process technologies. Each technology typically requires multiple libraries which are optimized for performance, power, area, and others. Your responsibilities will include but not be limited to:
- Directing transistor-level circuit design, simulation and analysis, directing layout, and post-silicon validation
- Working with both project teams and internal CAD engineers to ensure the libraries function as required in the project and design flows, including collateral support (EDA models, data sheets and consulting) expected by customers using an ASIC-like flow

Qualifications
You must possess a Bachelor of Science degree in Electrical Engineering or Computer Engineering with more than eight years of experience (or a Master of Science degree with more than six years of experience) in Very Large Scale Integration (VLSI) design. Additional qualifications include:
- In-depth understanding of Complementary Metal-Oxide Semiconductor (CMOS) technology, logic circuits and CMOS layout
- Good knowledge of library design, including cell architecture and characterization, model generation, physical design and/or APR and low power and/or optimization techniques
- Strong background in transistor-level circuit design
- Good written and verbal communication skills
- Good teamwork and project management skills

send your resume to: jingyuex@gmail.com with title as above.