IC Design Lead/Sr. Staff IC Design Engineer
Tianjin, China
Job Description

Responsible for IC digital designs by high level languages (e.g. Verilog/VHDL, C) with the followings:

IP/Module development by Verilog coding and C modeling where necessary, doing simulations and module/chip level verifications.
Perform logic synthesis, DFT, top-level integration and STA.
Participate in the system architecture definition and work as a global team to do complex SOC design based on embedded processors, such as ColdFire, ARM, PowerPC and DSP.

Specific Knowledge/Skills
Relevant project experience in digital designs based on high-level languages, either in ASIC or FPGA, with good knowledge of digital design flow, including coding, simulation, synthesis, DFT, STA .
Relevant experience in the area of embedded processors, MCU or DSP is an advantage.
Familiar with main EDA tools, such as Synopsys, Cadence and Mentor.
Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment.
Bachelor and above degree in Electronic, Communication and Microelectronics Engineering, with minimum 8 years of IC design & management experience.
Good English reading, writing, good verbal English is preferred

Email: chris.chalberg@freescale.com
Work Phone: 512-895-6946
Wireless Phone: 512-567-3217
Fax: 512-532-7981
freescale.com
6501 William Cannon Drive West
Austin, Texas 78735
If you want me forward for you, please put title: Freescale China. email to:
liruil@gmail.com.