ASIC & FPGA Physical Design Engineer
Blair Mandell at: 831-461-1345
3Leaf Networks is developing the infrastructure required to support both scale-up and scale-out virtual computing in the enterprise datacenter. 3Leaf is ramping up the engineering team, providing an opportunity for you to participate in the early stages of company growth; and to share in the rewards that will come with our success. The people we want will be intelligent and creative, will be anxious to explore new solutions, and will have a desire to see the results of their work well received by our enterprise customers.
Job Title: ASIC & FPGA Physical Design Engineer
* Develop and support FPGA & ASIC synthesis flow and scripts
* Perform FPGA synthesis and place-and-route
* Evaluate standard cell, memory and I/O libraries for ASIC
* Run full-chip static timing analysis
* Develop ASIC floorplan and do full-chip placement
* Work with ASIC vendor on DFT, power planning & analysis, place & route
* 5+ years experience in ASIC & FPGA synthesis and static timing analysis
* Experience in floor planning and placement is desired
* HyperTransport FPGA implementation experience desired
Please send your resume for immediate consideration.
831-461-1345 hm office